Job Description

Overview

Join to apply for the FVCTO - Formal Verification Architect role at Intel Corporation .

Intel puts silicon at the heart of the worlds most advanced technologies. Every day we create worldchanging solutions that enrich the lives of people everywhere. If you have a big idea, lets do something wonderful together and build a better tomorrow.

Job Details

Job Description:

Who You Are

• Verify microarchitecture using industrystandard formal verification tools and technologies based on the latest model checking and equivalence checking algorithms on worldclass design IPs and SOCs for server, client, and graphics.
• Leverage hardware architecture design and RTL implementation details.
• Define the formal verification scope; deploy the right strategy to prove correctness while deploying advanced formal techniques and create abstraction models for convergence on the design.
• Carve out the right boundaries for the design, create comprehensive formal verification test plans, track, verify, apply abstraction techniques, and converge on complex designs to deliver a highquality design on schedule and articulate the ROI.
• Analyze new methodologies, evaluate new tools, and corroborate results.
• Work with vendors to resolve hard design and tool problems.

Qualifications

• Problemsolving and debugging skills.
• Willingness to work closely with various design teams and crosssite teams.
• Verbal and written communication skills.
• Motivated, selfdirected and able to work effectively both independently and in a team environment.

Minimum Qualifications

• Bachelors Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 9 years of relevant experience OR Masters Degree with 6 years of relevant experience OR PhD with 4 years of relevant experience.

Experience

• RTL languages like SystemVerilog or VHDL; assertion languages like SVA, formal verification.

Preferred Qualifications

• Fundamentals of formal verification technology, including model checking and writing formal assertions to express architectural intent of designs.
• Formal verification principles and methods.
• Computer architecture, digital design, and verification methods.
• Research in the formal verification domain.

Job Type

Experienced Hire

Shift

Shift 1 (United States of America)

Locations

Primary location: US, California, Santa Clara.
Additional locations: US, California, Folsom; US, Oregon, Hillsboro; US, Texas, Austin.

Business Group

The Silicon Engineering Group (SIG) focuses on the development and integration of SOCs, cores, and critical IPs to power Intels leading products.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits

We offer a total compensation package that ranks among the best in the industry. It includes competitive pay, stock, bonuses, and benefit programs such as health, retirement, and vacation. Find more information about all of our benefits here:

Annual Salary Range (US)

$186,070.00$303,140.00 USD

Work Model

This role will require an onsite presence. Job posting details such as work model, location or time type are subject to change.

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